adders

It seemed as though two immense adders of steel were to be seen crawling towards the crest of the table-land.

远远望去，好象两条钢筋铁骨的巨蟒爬向那高地的山脊。

In particular embodiments, the interpolation units are formed from adders and shifters and do not include any multipliers.

在特定的实施方式中，该内插单元由加法器和移位器形成，而且不包括任何乘法器。

Encounter adders at Allerthorpe, the best place in Britainto see them.

遇到猪鼻蛇，这是在大不列颠观察他们的最佳的地点。

Adders and serpents, let me breathe a while!

小毒蛇和大毒蛇，让我喘口气！

Adders add up the command motion amounts and the respective compensation motion amounts to drive respective motors.

加法器将指令移动量与各补偿移动量相加以驱动各马达。

Unhappily, though the nation still retains its ears, the players and playgoers of this generation are for the most part deaf as adders.

不幸的是，尽管国家的耳力尚存，可这一代的戏剧从业者和观众却耳聋透顶。

Twice puff-adders came twisting into the alert ring of our debating coffee-circle.

鼓腹毒蛇曾经两次窜进我们的喝咖啡和进行讨论的警戒圈内。

I loved their sign: "Adders very active at this time of year, keep to the paths" .

我喜欢他们的告示：“每年这个时候是蝰蛇异常活跃的时期，请勿偏离小路行走。”

By using quantization scheme, the use of multipliers can be substantially reduced and simplified to only adders.

透过量化的方法，乘法器的数量可以被大幅度减少成只使用加法器。

Reuse of some adders and registers in IIR filter design- for-testability, additional hardware and area overhead are reduced.

通过复用原电路中的部分寄存器和加法器来提高其可测性，降低了额外的测试硬件面积开销。

Because of the requirements for high speed and high precision in adders, redundant signed digit number adders are proposed.

冗余符号数加法器满足了对加法器高速度和高精度的要求。

Operation of plurality add is very complicated. In the design will numerous adders be used and large area will be consumed.

复数加法运算复杂，用硬件实现复数加法，需要使用数目众多的加法器，占用大量的面积。

Adders have a dark zigzag stripe down their back.

加法器有一个黑暗的曲折条纹他们回来。

Only full adders (3: 2 compressor) and half adders are used in our Wallace tree.

只有全加器（3：2空气压缩机）和半加器用于我们的华莱士树。

Delay Time Formulae and Optimizing Sequence of Hybrid Modules Cascade Carry Lookahead Adders

超前进位加法器混合模块延迟公式及优化序列

Design of Hybrid Modules Cascade Carry Lookahead Adders without Waiting Time Sequence

混合模块无等待时间序列超前进位加法器设计

Delay Time Formulae and Optimizing Design of Carry Lookahead Adders

超前进位加法器的延迟时间公式与优化设计

Tabular synthesis of three-variable functions using one-bit full adders

基于一位全加器三变量逻辑函数的查表综合

Specification and Verification of Ripple Carry Adders Based on Rewriting Induction Techniques

基于重写归纳技术的串行加法器的描述和验证

Inductive Verification of Powerlist-Based Carry Lookahead Adders

基于幂表的并行加法器的归纳验证